Memory wear-out, permanent errors generating “stuck-at” bits, and transient errors from bits that inappropriately flip states can plague memory devices. Error detection and error correction schemes may be incorporated in computing systems at various levels to insulate software and data stored on memory devices from experiencing soft and hard errors occurring at the physical memory. Soft errors refer to correctable errors, for example those errors that may be corrected by re-writing the data. Hard errors refer to permanent errors, for example those errors that may be due to a physical defect or other anomaly that corrupt bits in a repeatable manner. Sometimes when a block of memory has multiple soft errors, the memory block may be considered to have a hard error.
For certain memories that wear out, hard errors are typically detected during write operations, often via read-after-write, assuming non-destructive data. Because it is useful to know the location where a hard error occurs, some solutions for error correction involve recording information about the location of the faults in another memory location. However, if no information about the location of the faults is recorded during the write operation or a memory failure occurs at the location storing the information about the location of the faults, this information is lost. Thus, during a subsequent read or write operation, the faulty cells may not be identified.